| 1. | Design basis of combinational logic circuit
组合逻辑电路设计基础 |
| 2. | Combinational logic circuit
组合逻辑电路 |
| 3. | Finally , we study two applications of bdd . the first one is the fault detect of combinational logic circuits
最后，研究了基于bdd的组合电路的故障检测方法和基于bdd的网络可靠度的计算方法等两方面的应用。 |
| 4. | The results of simulation prove that the improved algorithms are feasible for evolving the digital combinational logic circuits and improve the evolvable efficiency and convergence performance
仿真实验结果证明了改进演化算法对于实现函数级数字组合逻辑电路的硬件演化是可行的，并且提高了演化算法的演化效率和收敛性能。 |
| 5. | Evolvable algorithms are applied to functional digital combinational logic circuits with the structure of classicepglo chip of altera co . and the detailed analyses of typical examples are also given
结合altera公司classicep610芯片的结构，研究了将演化算法应用于函数级数字组合逻辑电路的硬件演化，并且对典型实例进行了详细分析。 |
