| 1. | Interface charge has a profound influence on the breakdown voltage of flr structure . on severe condition it can make the outer flr far from main junction disfunction
界面电荷对场限环终端结构的击穿电压影响很大，严重的甚至可以使远离主结的场限环失去作用。 |
| 2. | The breakdown mechanism of soi ldmos with located charge trenches was analyzed in this thesis . the interface charge model for the breakdown voltage was proposed
本课题分析具有局域电荷槽结构的soildmos的纵向耐压机理，提出界面电荷耐压模型，这是迄今为止所见报道的高压soi器件理想的新模型。 |
| 3. | With offset fp structure obtained by using our method the device breakdown voltage is higher than flr structure , and this structure can screen the influence of interface charge in part and improve the stability of device performance
用我们的方法设计的偏移场板结构不仅比场限环结构提高了击穿电压，而且部分地屏蔽了界面电荷对器件击穿电压的影响，提高了器件工作性能的稳定性。 |
| 4. | Charge qs was located near the interface of silicon and oxide . with more charge , the field of buried oxide was improved up to the critical breakdown field basis on entirely continuity of electric displacement vector , and then the vertical breakdown voltage was raised . the comparisons between analytical and simulative results proved its availability of this model to interpret the vertical blocking mechanism
该模型认为，将界面电荷qs引入i层si / sio2的si界面，根据电位移矢量的全连续性，界面电荷qs越多，使i层内电场增加，直至sio2的临界电场，从而提高纵向击穿电压vb . v ，很好得解决了器件的纵向耐压问题。 |
| 5. | 4 the cleanout and the passivation of si surface was carried out by a two - step process to overcome the surface oxide layer and balance the charge between the substrate and epitaxy . by this way , the crystal quality and emission characteristic of zno thin films can be improved , which provide a way to resolve the native oxide layer of si substrate
4 、通过用等离子体对硅衬底表面进行清洗和钝化两步处理，解决硅衬底表面的氧化层和界面电荷平衡问题，制备出了高质量的氧化锌薄膜材料，找到了一条获得了高质量的氧化锌薄膜的新途径。 |
| 6. | During the high - voltage device design , the thick epitaxial layer ldmos which is compatible with current technology was researched . this device used piecewise vld and multiple region structure f reduce field layer . the using of the f reduce field layer effectively reduce the surface electric field of the device , shorten the length of its drift region , enlarge the choice of range of the ion implant dose of the p layer , and effectively restrain the disadvantageously affection on the breakdown voltage of the interface charge qss
在高压器件研究中对与现有工艺相兼容厚外延ldmos进行研究，该结构采用分段变掺杂多区p ~ -降场层，有效降低器件的表面电场，缩短器件的漂移区长度，增大p ~ -降场层注入剂量的选择范围，并有效地抑制界面电荷qss对器件耐压的不利影响。 |
| 7. | Carrier aggregation on the interface between organic layer and electrodes may screen extra electric field and reduce barrier height for carrier injection . ( 3 ) we utilized oxd as buffer layer in anode and lif in cathode in single layer mehppv pleds . and the efficiency and brightness was doubled . the results implied that aggregation of minority carriers at the interface may the role of blocking layer
( 3 )在单层mehppv器件的阳极引入oxd作为电子阻挡修饰层， lif作为阴极修饰层，利用阻挡少数载流子实现界面电荷积累的方法提高了器件发光亮度和效率，分析了器件电流电压特性，使器件发光效率和亮度提高了一倍以上。 |
