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Home > chinese-english > "csmc" in English

English translation for "csmc"

成电路设计西安产业化基地日前宣布与
广达常熟制造城
华润上华
科技有限公司
上华半导体公司
上华半导体有限公司
上华华晶
上华科技
岁鼓手
无锡上华
中芯国际


Related Translations:
csmc technologies:  华润上华上华科技
csmc technologies corporation:  上华科技有限公司
Example Sentences:
1.And accomplish the simulation using csmc 0 . 6m process , obtaining satisfying results
对两种设计方案的模拟结果进行了比较。
2.Csmc has ccsi model which had been successfully employed in government policies and companies str - ategies in recent years
测评中心是在中国标准化研究院与清华大学多年合作并取得丰硕科研成果的基础上成立的。
3.The circuit design of bandgap voltage reference is completed , considering the high order temperature compensation with real resistors . the circuits designed have been simulated , using csmc 0 . 6um cmos parameter files
在考虑利用实际电阻的温度系数来进行带隙基准高阶温度补偿的基础上,实现了带隙电压基准源的电路设计。
4.The circuit was simulated via hspice based on csmc 0 . 5um process whose results indicates the all modules have meet the requirements and the efficiency can go up to 95 % under pwm mode and stay above 90 % under pfm mode when the load resistance
芯片内设过热保护和欠压保护,以实现电路的可靠性操作。最后设计电路基于0 . 5 mcomsn阱工艺,用hspice仿真,每个模块性能都满足电路要求。
5.With the development toward sub - micron and deep sub - micron technologies , cmos will have extremely wide market prospects , because its low cost and easy of implementation . hence all the simulation of this paper uses the csmc 0 . 6 m standard cmos process
标准cmos工艺作为数模混合集成电路的主流工艺,随着cmos技术的发展,具有广泛的市场前景,本文就是在在csmc0 . 6 m标准cmos工艺库下进行仿真的。
6.In this study , the design procedures for mitigating radiation effects mechanisms have been implemented in a gate array design , we have obtained samples of integrated circuits test structures manufactured by wuxi csmc - hj using their 0 . 6 - m cmos process
在研究中,我们将降低辐射效应的设计方法应用到门阵列设计中,获得了华晶上华半导体有限公司采用0 . 6 m的cmos工艺生产的集成电路样片,具有100krad ( si )的抗总剂量辐射能力。
7.China ' s domestic companies included 86 ic design companies : china integrated circuit design co . , ltd . , datang microelectronics , c * core , spreadtrum communication , lhwt , shenzhen state microelectronics , shenzhen zte ic design , hisense hiview tech . , etc . ; 25 manufacturers : smic , huahong nec , hejian , china resources microelectronics , grace semiconductor manufacturing , csmc tech . , asmc , etc ; 10 engaged in packaging and testing , such as nantong fujitsu , jiangsu changjiang electronics , tianshui huatian , 10 semiconductor equipment manufacturers : cetc no . 2 institute , cetc no . 48 institute , beijing sevenstar huachuang , institute of microelectronics of the chinese academy of sciences , institute of optics and electronics of the chinese academy of sciences etc . ; 37 semiconductor materials providers , including grinm semiconductor materials , heraeus zhaoyuan precious metal materials , etc
国内参展商包括中国华大、大唐微电子、苏州国芯、展讯通信、六合万通、深圳国微、深圳中兴集成电路、海信信芯科技等86家集成电路设计公司;中芯国际、华虹nec 、和舰科技、华润微电子、宏力半导体、华润上华、上海新进等25家主要集成电路制造企业;南通富士通、江苏长电、天水华天等10家封装测试企业;中电科技集团第2研究所、第48研究所、七星华创、中科院微电子所、中科院光电所等10家半导体设备企业;有研硅谷、贺利氏招远等37家半导体材料企业。
8.In the meantime , the all sub - circuits are also designed and emulated carefully including inverter , rs type flip - flop , voltage reference circuit , error amplifier , voltage comparator , sawtooth - wave generator , pwm comparator , soft activation circuit and so on . as a result , all of the sub - circuits answer the requirements . this chip has taped out with the 0 . 5um mix - signal process of csmc
本文利用cadenceeda集成电路设计工具、 spectres仿真工具,对集成电路内的各个模块包括反相器、基本rs触发器、基准电压电路、误差放大电路、电压比较电路、锯齿波振荡发生电路、 pwm比较电路、软启动电路、驱动电路等进行了具体的设计和仿真,且达到了预先设定的指标。
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