| 1. | Idct inverse discrete cosine transform
非连续反余弦变换 |
| 2. | Idct inverse discrete cosine transform
离散余弦逆变换 |
| 3. | A hierarchical coding technique based on all phase idct interpolation
晶体相位补偿网络及在线性相位滤波器中的应用 |
| 4. | The motion estimation and dct / idct arithmetic have fully exploited the parallel characteristic of fpga
提出的运动估值算法和dct idct算法充分利用fpga的并行性特点。 |
| 5. | The dct / idct module and the motion estimation module which need more operation are found and optimized . and the dct / idct module is transformed to fix - point
本文对h . 263视频编解码的基本原理、系统结构和压缩方法做了简要的分析。 |
| 6. | The system is composed with six sections which are entropy decoder , inverse z transform , inverse quantization , inverse discrete cosine transform ( idct ) , up sampling and color space transform
Jpeg解码算法主要由熵解码、逆z变换、反量化、反离散余弦变换、内插和色度空间转换六部分组成。 |
| 7. | In chapter two , using the instruction of simd and memory in pentium to optimize idct , motion compensation and recompose frame and improving executive speed of idct to utilize vlcd and iq
在第二章中，使用intel处理器中的simd指令和内存优化技术对idct (反离散余弦变化) 、运动补偿和图像重组等解码过程进行优化实现。 |
| 8. | A fast idct algorithm is applied for the speed optimization of the idct module , and mmx technology is also adopted to obtain higher decoding speed of the basic decoder on pc platform
为了提高基本解码器的解码速度，本文对基本解码器中idct模块采用快速算法进行速度上的优化，并采用mmx技术进一步提高基本解码器在pc平台上的解码速度。 |
| 9. | Depending on the constructure of tms320dm642 and unique characteristic of h . 264 application program , we optimized whole structure and dct / idct , quazitation and vlc which cost most of coding time
针对tms320dm642芯片的结构和h . 264应用程序自身的特点,对该协议的总体结构以及其中最耗时模块中的dct / idct以及量化和vlc编码部分进行软件优化。 |
| 10. | Thirdly dct is implemented using chen fast dct algorithm . we transform float - point arithmetic into fixed - point arithmetic , which meeting the precision requirements of the ieee 1180 standard , to accord with fixed - point c6201 dsps
随后在dct变换编码中，采用chen快速dct算法，在保证idct精度符合ieee1180标准条件下，将浮点dct系数转化为与c6201定点dsps运算单元相适应的定点系数。 |
