English translation for "哈佛结构"

harvard architecture

Related Translations:

佛:  佛名词1.(佛陀) the buddha 短语和例子拜佛 worship the buddha2.(修行圆满之人) real buddhist3.(佛教) buddhism 短语和例子佛海 the wide-open church of buddhism; 信佛 believe in buddhism4.(佛像) statue of the buddha 短语和例子铜佛 a

Example Sentences:

	1.	Adsp sharc21060 is one of current digital signal processing boards based on super harvard architecture , and it " s architecture is designed to streamy parallel Adspsharc21060是一种基于超级哈佛结构的通用数字信号处理器， sharc的结构被设计为流水线并行处理器。
	2.	Consisted of adsp21060 - sharc parallel 32 - bit floating point dsp , distributed parallel system and shared bus parallel system will satisfy signal processing tasks in sar application fields . this paper discusses range - doppler ( rd ) algorithm and two - dimension detachable algorithm in the side - looking model in synthetic aperture radar ( sar ) respectively , then studies the realization on multi - chips adsp21060 sharc dsp system 以美国ad公司的adsp21060 - sharc (超级哈佛结构计算机)系列并行32位浮点dsp构成的分布式并行系统和共享总线式并行系统，可以满足综合孔径雷达( sar )应用领域的信号处理任务。
	3.	Through adopting have ha the pic only flat machine of buddha structure , not only , have raised the ability of interference rejection with which systematic real time handles speed and has strengthened system ; when exceeding the speed limit , through adopting acousto - optic report to the police remind driver in time accurately will slow down to travel 通过采用具有哈佛结构的pic单片机，不但提高了系统的实时处理速度而且增强了系统的抗干扰能力；在超速时，通过采用声光报警及时准确地提醒司机要减速行驶。
	4.	The core is based on harvard architecture with 16 - bit instruction length and 8 - bit data length . the performance of mcu has been improved greatly by introducing single - clock - cycle instructions , setting multiple high - speed working registers and replacing micro - program with direct logic block etc . to keep the mcu core reusable and transplantable , the whole mcu core has been coded for synthesis in verilog hdl 该mcu核采用哈佛结构、 16位指令字长和8位数据字长，通过设计单周期指令、在内部设置多个快速寄存器及采用硬布线逻辑代替微程序控制的方法，加快了微处理器的速度，提高了指令的执行效率。
	5.	It is designed for embedded applications with the following features : separate instruction and data caches ( harvard architecture ) , 5 - stage pipeline , hardware multiplier and divider , interrupt controller , 16 - bit i / o port and a flexible memory controller . new modules can easily be added using the on - chip amba ahb / apb buses . it has flexible peripheral interfaces , so can be used as an independent processor in the board - level application or as a core in the asic design 它遵照ieee - 1745 （ sparcv8 ）的结构，针对嵌入式应用具有以下特点：采用分离的指令和数据cache （哈佛结构） ，五级流水，硬件乘法器和除法器，中断控制器， 16位的i / o端口和灵活的内存控制器，具有较强的异常处理功能，新模块可以轻松的通过片上的ambaahb / apb总线添加。
	6.	On the base of analyzing the sparc instruction set , this paper researches the pipeline technology and the resolution of correlation problems , and these problems were resolved by using the harvard architecture , internal forwarding and delay branch technology 本文在分析sparc指令系统的基础上，研究了流水技术及其相关问题的解决方法，并通过在硬件上使用哈佛结构、提前写寄存器的操作时间以及内部前推和延迟转移等技术较好的解决了结构相关、数据相关和转移相关的问题。

Similar Words：

"哈佛海沟" English translation, "哈佛和汉堡之间的大陆地区" English translation, "哈佛架构" English translation, "哈佛教育评论" English translation, "哈佛教育研究刊物" English translation, "哈佛兰" English translation, "哈佛李麦克班" English translation, "哈佛里尔新闻报" English translation, "哈佛每月指数图表" English translation