| 1. | Design and analysis of high - speed sdh frame synchronous scheme
复接器帧同步系统的设计和性能分析 |
| 2. | Research of multiplexer for data
数据复接器研究 |
| 3. | In chapter 4 we also describe some details of the packet scheduling algorithm . finally , we will introduce the hardware scheme of multiplexor
最后我们将在第五章中讨论复用设备中复接器部分的硬件结构。 |
| 4. | Being important equipment , high rate multiplexer plays a key role in the function of the space data link network
高速复接器作为空间飞行器星上网络的关键设备，其性能对整个空间数据网络的性能起着重要影响。 |
| 5. | A novel congestion control method in atm networks at the user network interface is proposed on basis of neural networks in this paper
针对实时性业务在atm复接器uni的拥塞问题，提出一种基于神经网络的拥塞控制方法。 |
| 6. | We also present a simple communication . using this protocol , multiplexors can establish communication link and control data traffic
我们结合项目的实际情况，提出一种简单的通信协议( mcp )以满足两个复接器间通信链路的建立、同步和流量控制。 |
| 7. | At last this paper introduces a speech and data multiplexed based on multi - cpu and vlsi vocoders . the operation principle and characteristics of the multiplexed are analyzed
介绍了采用多cpu系统和vlsi声码器为核心的语音数据复接器，分析了系统的工作原理和特点。 |
| 8. | With fpga technology , the speed of the high rate multiplexer is greatly increased . it will be applied in the spacecraft data systems and meet the requirements of the space missions in future
应用硬件可编程逻辑芯片fpga设计高速复接器，大幅度提高了数据的复接速率，可应用于未来的星载高速数据系统中，能够完成在轨系统的数据复接任务。 |
| 9. | A series of key techniques have been so1ved as we11 . now we have completed this design . the system has passed the qua1ity va1 idat iofl of our compafly and fina1 1 zat ion for both des ign and product ion
作者完成了系统方案设计、各个主要模块以及多路可变速率数据分接复接器( dtv35和dtx50两种专用芯片)的设计、实现，解决了一系列关键技术。 |
| 10. | A testbench program is edited to simulate the behavior of the fifo . after the software simulation is accomplished , a real hardware circuit is designed to multiplex two data channels ( 1553b data channel and 1394 data channel ) according to ccsds standard . during the experiment and hardware debugging , the output logic of the fpga is checked up
设计中，用vhdl语言对高速复接器进行行为级建模，为了验证这个模型，首先使用软件进行仿真，通过编写testbench程序模拟fifo的动作特点，对程序输入信号进行仿真，在软件逻辑仿真取得预期结果后，继续设计硬件电路，设计出的实际电路实现了将来自两个不同速率的信源数据( 1394总线数据和1553b总线数据)复接成一路符合ccsds协议的位流业务数据。 |
