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Home > chinese-english > "系统级芯片" in English

English translation for "系统级芯片"

system-on-a-chip

Related Translations:
磊芯片:  led epi wafer
晶体管芯片:  transistor chip
芯片处理:  chiprocessingdie processingwafer processing
芯片编号:  chip number
芯片数量:  chicountcount, chip
芯片粘贴:  die bonding
测试芯片:  test chiptest die
微芯片:  microchip
芯片操作系统:  cos chioperation system
性格芯片:  personality chips
Example Sentences:
1.Measurement challenges for on - wafer rf - soc test
晶圆上测试射频系统级芯片的挑战
2.And it not only can be applied as a module , but also can be widely applied in system level chip design
该软核既可以单独使用,也可集成到系统级芯片中。
3.In the process of system developing , the engineer should first solve the problem of dft , especially when lots of digital circuits or ip cores are used in system on chip
在系统级开发的过程中需要优先解决可测性问题,特别是设计系统级芯片会用到很多数字线路和ip内核。
4.Since the soc design excels multi - chip in speed , power consuming and cost , it is of extreme importance to develop soc design in future ic industry
由于单片系统级芯片设计在速度、功耗、成本上与多芯片系统相比占有较大的优势,因此发展soc设计在未来的集成电路设计业中将有举足轻重的地位。
5.In chapter four , we discuss the criterion and design flow of a whole asic design and soc design methodology . verilog programming technique according to synthesis is introduced finally
第四章就芯片设计的asic设计流程和soc (系统级芯片)的关键技术进行了介绍;最后介绍了针对综合的verilog编程技巧。
6.The system is compose of pc ( desktop or laptop ) , software kit , scm ( single chip micyoco ) , double - channel sram , large - scale programmable system - level epm7000 series chip
该系统设备主要由pc机(台式机、笔记本电脑)及相关软件包、单片机、双通道sram 、大规模可编程系统级芯片epm7000系列器件等组成。
7.According to the requirement of the vlsi and the wide application of power electronics , ip soft core of spwm generation system is designed . and it can be widely applied in system level chip design
论文针对目前大规模集成电路设计要求,结合电力电子应用,设计了一个spwm信号产生系统ip软核,该软核可广泛应用于系统级芯片设计中。
8.In chapter 5 we discuss the design of ieee754 standard fpu ( floating point unit ) . processor and uart ( universal asynchronous receiver transmitter ) , these cores are used in this dissertation , fpu is used for floating point complex fft processor , uart is used for fft processor " s peripheral and our test platform . in chapter 6 we discuss the design for testability , including atpg , bist and jtag method , discuss the different verification and simulation strategy in soc scale facing to different modules , build up the test platform which is used to test high performance application specified digital signal processing processor . in chapter 7 we summarize the research results and creative points , and point out the further work need to do in the future
第五章提出了基于ieee754浮点标准的浮点运算处理器的设计和异步串行通信核的设一浙江大学博士学位论文计,提出了适合硬件实现的浮点乘除法、加减运算的结构,浮点运算处理器主要用于高速fft浮点处理功能,异步串行通信核主要用于pft处理器ip核的外围扩展模块以及本文所做的验证测试平台中的数据接口部分第六章提出了面向系统级芯片的可测试性设计包括了基于扫描测试atpg 、内建自测试bist 、边界扫描测试jtag设计,在讨论可测试性设计策略选择的问题上,提出了针对不同模块进行的分别测试策略,提出了层次化jtag测试方法和扫描总线法,提出了基于fpga
9.Due to the development of 1c technology , now a complex system can be integrated in a chip called system on chip ( soc ) . the design of soc needs new design methodologys and modeling tools . systemc is an open c + + modeling platform promoted by the open systemc initiative , which consists of a well defined set of c + + classes and a simulation kernel , supporting design abstractions at the register - transfer , behavioral , and system levels . the advantages of systemc include the ability for hardware - software co - design , the ability to exchange ip easily and efficiently , and the ability to reuse test benches across different levels of modeling abstraction
系统级芯片的设计需要新的设计方法和建模工具。 systemc是osci ( opensystemcinitiative )组织制定和维护的一种开放源码的c + +建模平台,它由一个定义良好的c + +类库及仿真内核组成,支持对系统进行寄存器传输级,行为级和系统级的描述。 systemc的优点包括对软硬件联合设计的支持,更高效和方便的进行ip交换,以及在不同的抽象模型间复用测试基准的能力。
Similar Words:
"系统级的" English translation, "系统级封装" English translation, "系统级描述语言" English translation, "系统级模拟" English translation, "系统级设计" English translation, "系统技术" English translation, "系统技术分析" English translation, "系统技术公司" English translation, "系统技术顾问" English translation, "系统技术描述" English translation