| 1. | Specifies that the fields of this type are laid out automatically
指定此类型的字段为自动布局。 |
| 2. | Has an automatic layout
具有自动布局。 |
| 3. | Specifies that class fields are automatically laid out by the common language runtime
指定类字段由公共语言运行库自动布局。 |
| 4. | This paper expatiates on the key technology of three - dimensional component packing system developed in the environment of autocad with objectarx
对采用objectarx实现三维自动布局系统的关键技术进行详细论述。 |
| 5. | With all the methods above , a wonderful floorplan with good placement and high routebility and low power and timing convergence has been achieved
运用上述理论,本文完成了一款750万门数字soc电路自动布局布线,并预计7月份流片试验。 |
| 6. | When the prototype layout is transferred to a cad system for pcb layout it is important to disable , or at any rate override where necessary , any automatic routing or component placing software
原型电路搭试结束，开始使用cad工具设计pcb时，尽量不要依赖自动布线和自动布局功能。 |
| 7. | By meshing hydraulic manifold in three dimensions and considering its machining technological characteristics , a designing method to arrange the oil passages in hydraulic manifold automatically is presented in this paper
摘要通过对液压阀块的三维网格划分，结合液压阀块机械加工的工艺特点，本文提出了基于李氏迷宫算法的液压阀块孔道自动布局的设计方法，并进行了初步的软件实现。 |
| 8. | In chapter 5 , design methods of the digital control circuits are introduced . further more , sensor dynamic range adjustment methods are also introduced . in chapter 6 , measurement and results are introduced and analysis a
第五章主要介绍了通过数字电路设计方法（ verilog语言描述， synopsys软件综合， cadencese自动布局布线）进行数字控制电路设计的方法以及传感器感光动态范围调整的设计考虑。 |
| 9. | We use different commercial eda tools in order to achieve better implementation in different design phase , which include silicon ensemble of cadence , design compiler and design primer of synopsys and so on
在设计的不同阶段使用了不同的主流eda工具进行辅助设计和验证，包括synopsys公司的逻辑综合工具designcompiler 、静态时序分析工具designprimer和cadence公司的自动布局布线工具siliconensemble等。 |
| 10. | 2 montoye r k , hokenek e , runyon s l . design of the ibm risc system 6000 floating - point execution unit . ibm journal of research and development , 1990 , 34 : 59 - 71 . 3 oberman s . floating - point arithmetic unit including an efficient close data path
我们采用90纳米cmos标准单元工艺以及synopsys自动布局布线流程进行实验，实验结果表明该算法在高性能双通路结构的浮点加减运算中引入后，可以使得近路径的运算延迟整体降低10 . 2 % ，且算法本身没有造成新的关键路径。 |
