| 1. | In this paper , hardware / software codesign is used to solve die problems
本文采用软硬件协同设计的思想来进行md32存储系统的设计。 |
| 2. | Research and implement in cluster data communication mechanism based on software hardware codesign
基于软硬件协同的机群数据通信机制的研究与实现 |
| 3. | 5 li y , callahan t , darnell e et al . rm hardware - software codesign of embedded reconfigurable architectures
使得人们能够为研究高效的csp方法而开发良好的功能程序范例与变换技术。 |
| 4. | By using hardware / software codesign , the design cycle can be shortened and design efficiency can be improved
软硬件协同设计协调软硬件开发过程并行开展，一方面可以缩短设计周期，极大地提高设计效率。 |
| 5. | A design support environment is a necessary in order to support parallel design and collaborative design . a codesign environment ? yh - cde is prsented in the thesis
软硬件协同设计强调设计进程的并行化和协作化，该设计方法需要相应辅助设计环境的支持。 |
| 6. | The achievements of this paper have great theoretic and realistic significance to hardware / software codesign methodology and promote the application of codesign techniques
本文的研究成果对于推动软硬件协同设计技术的发展和应用有重要的理论意义和实践意义。 |
| 7. | The hardware / software co - synthesis determines the hardware and software a ] location and function mapping . hardware / software co - synthesis is a key problem of hardware / software codesign
软硬件协同综合决定系统功能在软硬件实现结构上的分配，是软硬件协同设计的核心问题。 |
| 8. | Currently , the hardware / software codesign of a 32bit mulitmedia dsp named md - 32 is under way in the institute of information & communication engineering of zhejiang university
目前，浙江大学信息与通信工程研究所正在进行32位多媒体数字信号处理器(命名为md - 32 )的软硬件开发。 |
| 9. | This paper describes the design and implementation of a biochip scanning and analyzing system based on the embedded microprocessor / dsp codesign . the dsp software design of the system is presented in detail
本文设计并实现了基于dsp和嵌入式处理器协同工作的生物芯片扫描分析系统，并着重叙述了整个系统的架构以及系统的dsp软件设计。 |
| 10. | The thesis addresses the following key techniques in hardware / software codesign " system level behavior model , design evaluation , hardware / software co - synthesis and prototyping of embedded microprocessor
本文的主要研究了系统软硬件协同设计中的若干关键技术，包括：系统模型、设计评价技术、软硬件协同综合和嵌入式微处理器虚拟原型技术。 |
