| 1. | Deploy only sfn multiplexes in the initial stage . the government should
在起行的阶段，政府应 |
| 2. | Sfn single frequency network
单频网同步网 |
| 3. | A design of system level is presented in this thesis according to the function of the sfn adapter and sync system
根据dvb - t单频网适配器实现的功能,本文提出了它的系统设计框图,将其划分为若干模块。 |
| 4. | The international affairs committee ( sfn and us nas ) supports neuroscientists worldwide through professional training and international collaboration
国际事务委员会：藉由专业训练与跨国合作支持全球神经科学家。 |
| 5. | In this paper , how to realize multiplexing , linking internet into dvb network and synchronizing sfn using a package processor in dvb head - end is studied
本论文研究在dvb前端通过一个多功能的包处理器来实现复用、 internet接入dvb网络以及单频网同步的功能。 |
| 6. | Some excellent methods for optimizing the coverage of sfn are reviewed in this paper . a method for constructing single frequency network with low - power transmitters is proposed
摘要介绍了国际上流行的一些单频网覆盖优化方法，并提出了采用对人体辐射影响较小的小功率发射机进行信号覆盖的方案。 |
| 7. | The design in this thesis doesn ’ t aim to realize all the functions of sfn adapter and sync system but to focus on the core function to validate the feasibility
本文中的设计并不强调面面俱到,而是紧紧围绕单频网适配器和同步系统实现时间同步的核心功能进行,目的在于对基于fpga的设计方案的可行性进行验证。 |
| 8. | Recover the spectrums first . when analogue transmission had been switched off , then deploy more frequencies for additional multiplexes of sfn or mfn and allowing more capacity for programme providers and additional services
当模拟输送终止后，腾空出的频谱可为节目供应商及附加服务供应商提供更多频谱容量，以推出额外的单频网络或多频网络数码频道。 |
| 9. | If government insist on going ahead with deploying all sfns and mfns as planned and at the same time , the government should give priority to atv and tvb , the existing terrestrial broadcasters , if they were to apply for sfn multiplex licences
倘若政府坚持于同一时间推出所有建议的单频网络( sfn )及多频网络( mfn ) ，而现有地面电视广播机构即亚洲电视及无 |
| 10. | Simulations are executed in altera ’ s quartus ii environment with altera ’ s stratix family fpgas using verilog hdl after analysis . the results show that the sfn adapter can properly insert mip into transport stream and the time to be delayed in sync system can be correctly calculated and carried out with fifo
在对每一个模块的设计要点做了详细说明之后,采用verilog语言编写各模块逻辑代码,在altera公司的quartusii5 . 0集成开发环境下,基于altera公司stratix系列fpga对各模块及整个单频网适配器进行了仿真。 |
