| 1. | Asynchronous host intel and motorola bus standards supported
异步主机接口：支持 |
| 2. | Main unit i o : standard serial port
主机接口：标准串口 |
| 3. | Designed with two host interfaces
同步主机接口：符合 |
| 4. | Design and implementation of program bootloader based on dsp host port interface
主机接口的程序自举设计与实现 |
| 5. | Local home interface
本地主机接口 |
| 6. | Distinguish only lie in the categorized dsp little system can enable the host interface , while the adjudicate dsp little system disable the host interface
区别仅在于分类dsp小系统使能主机接口，判决dsp小系统禁止主机接口。 |
| 7. | Analyze the resource of dsp , utilizing its multichannel buffered serial ports ( mcbsp ) which simulates spi protocol to interface with ecg collecting module and utilizing its host - port interface ( hpi ) to interface with network module
分析dsp的资源，利用其多通道缓冲串口（ mcbsp ）模拟spi协议和心电采集模块接口，利用主机接口（ hpi ）和网络模块接口。 |
| 8. | This controller can implement different scanning controls for various common portable scanners of 100 to 400 dpi . it can communicate with pc through lpt , and fulfill the further display , analysis and handling of the scanning image data
该控制器能完成对常用的100dpi至400dpi的便携式扫描仪的各种控制，并且可用dsp的主机接口与pc机通讯，从而可以完成对图象数据的进一步分析、处理和显示。 |
| 9. | This hardware system has fully utilized interface hpi of host computer and memory resource that dsp offers , realizes parallel structure of share memorizer mode skillfully , the whole system structure is succinct , the programming is convenient and flexible , the expanding can be strong
该硬件系统充分利用了dsp所提供的主机接口hpi和内存资源，巧妙地实现了共享存储器方式的并行结构，整个系统结构简洁，编程方便、灵活，可扩展性强。 |
| 10. | Offer the bridge and tie of the information transmission between picture gather and pretreatment unit and many dsp parallel structure goal discerning unit . there is a mapping transformation from picture data source logic to host interface ( hip ) logic , and considers the conversion between 5v logic and 3v logic
提供了图像采集及预处理单元与多dsp并行结构目标识别单元进行信息传递的桥梁和纽带，将图像数据源逻辑映射成主机接口( hpi )逻辑，同时考虑了5v逻辑和3v逻辑间的转换问题。 |
