| 1. | Finally the simulation results are fulfilled the requirement
最终子模块的仿真都达到预定的要求。 |
| 2. | Is equivalent to a j2ee ear file and several other j2ee sub - modules
等同于一个j2ee ear文件和许多其他j2ee子模块。 |
| 3. | Every module is described by hardware description language verilog hdl and simulated
并用veriloghdl语言完成各子模块的设计，同时做了相应的仿真工作。 |
| 4. | The fifth part demonstrates the design of onboard subsystem from point view of hardware and software
第五章从软硬件角度详细描述了车载子模块的设计和调试。 |
| 5. | The construction and contents of sub - models in intelligent clocks and watches design system are introduced
然后介绍了钟手表智能设计系统的构成及各子模块的内容。 |
| 6. | Additionally , the dissertation gives a full and detailed picture of the functions realized by respective submodules
最后还详细介绍了其中各个子模块所实现的功能。 |
| 7. | A few submodules are included in every part . the submodules may be implemented as one or more processes
这些模块又分别包含若干子模块，不同的子模块分别实现为一个或多个进程。 |
| 8. | At last , the ppfc topology is applied into the project - 2kw dc / dc sub - module power and made good effect
最后，实现了ppfc的工程应用?成功研制了2kw电源子模块，获得了良好的效果。 |
| 9. | With this kind of equipment , we have manufactured stacks with pulse power of 600 w , and also some stacks sub - modules
利用这种设备做出了无铝叠阵脉冲功率60ow的叠阵，还做出了一些叠阵子模块。 |
| 10. | The “ commtor ” module is the foundation of the entire dplib . all the other modules rely on this module
通信子模块是整个分布式并行函数库的基础,其他模块(除了流水锁模块)的实现都依赖于该模块。 |
