Interstitial via hole : an embedded through - hole with connection of two or more conductor layers in a multilayer pcb 埋孔：多层pcb内的连接两个或以上导体层的镀通孔。
2.
Electroless deposition : the chemical coating of a conductive material onto a base material surface by reduction of metal ions in a chemical solution without using electrodes compared to electroplating 无电镀层：用化学还原反应使溶液中的金属离子还原沉积在基材表面形成的导体层，相对于电镀而言它不需要用电。
