Chinese translation for "延迟信息"
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- deferred message
Related Translations:
延迟滤波器: delay filterfilter with time delay 延迟植入: delayed implantation 操作延迟: delay of operationoperating delay
- Example Sentences:
| 1. | A list of tasks , information about task delays , and a bar chart showing the before and after effects of leveling 任务及其有关任务延迟信息的列表和显示资源调配之前和之后效果的条形图表。 | | 2. | The precision of determining ionospheric delay using gps is improved based on the further research of the related models and methods 通过对有关模型和方法问题的深入研究,进一步提高了利用gps提取电离层延迟信息的精度。 | | 3. | Traditional delay estimation based on ica requires the trail sequences to initialize the receiver , but the new algorithm based on ica does not need the trail sequences . it is based on the channel character of downlink , using the ica algorithm to estimate the multi - path mixture matrix , then , find the delay information which is embodied by the column vector of the mixture matrix . the simulation results show that it does enhance the performance of traditional detector without wasting the invaluable frequency resource 传统的信道估计算法需要训练序列使接收端的参数调整到理想状态,而本文提出的基于ica的信道估计的多用户检测算法不需要训练序列,它是利用下行信道的固有特点,用ica的盲源分离法估计出多径信道的卷积矩阵,从而从中提取出信道的延迟信息,仿真实验结果证明这种方法在节省了频谱资源的同时取得较好的估计效果,使得传统的接收机的误码性能得到了很大的提高。 | | 4. | According to the task and delay information of the floating - point unit , it was implemented with three - stage pipeline , including pre - normalization stage , calculation stage and post - normalization stage . approximately , the delay of each stage is equal with each other . also , floating - addition , floating - subtraction and floating - multiplication can been implemented by the floating - point unit 根据浮点单元承担的任务及延迟信息,采用三级流线实现:前规格化级( pre - normalizationstage ) 、计算级( calculationstage ) 、后规格化级( post - normalizationstage ) ,每一级的工作量和延迟近似相等。 | | 5. | The logic design of interface circuit is realized in verilog hardware description language ( hdl ) . function simulation is finished by modelsim software . after the synthesis , placing , routing and obtaining delay information by develop tool quartus ii4 . 0 , timing simulation is accomplished by modelsim software 接口电路的逻辑设计采用硬件描述语言veriloghdl ,先借助modelsim软件进行功能仿真验证,在quartusii4 . 0的集成开发环境中完成综合、布局布线并提取元器件和网线上的实际延迟信息后,再借助modelsim软件进行时序仿真验证。 |
- Similar Words:
- "延迟效应" Chinese translation, "延迟信道放大器" Chinese translation, "延迟信号" Chinese translation, "延迟信号灯" Chinese translation, "延迟信号放大器" Chinese translation, "延迟型更新" Chinese translation, "延迟型过敏" Chinese translation, "延迟型中继卫星" Chinese translation, "延迟形变" Chinese translation, "延迟性" Chinese translation
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