Chinese translation for "总线配置"

omnibus configuration

Related Translations:

总线输入总线:  bus-in bus

指令总线:  instruction bus

加法总线:  add busbus, summingsumming bus

供水总线:  service main

视频总线:  video bus

浮动总线:  floating bus

总线接插件:  bus connector

总线驱动器:  bd bus driverbus driver

扩充总线:  expa ion bus

系统总线:  mainbussystem bus

Example Sentences:

	1.	In the additional properties section under the bus configuration , select 在总线配置下的additional properties中选择
	2.	We can add our server to the bus with the bus configuration screen by selecting bus members 通过选择总线成员，可以将我们的应用服务器添加到带有总线配置屏幕的总线中：
	3.	Finally , if cross bus communication is being used , you need to specify inboundsecuremessaging as the inter - engine transport chain on the bus configuration panel 最后，如果使用交叉总线通信，则需要在总线配置面板中指定inboundsecuremessaging作为引擎间传输链。
	4.	Firstly , a description of the software architecture and functional module division is represented . secondly , a layered architecture of the communication system utility function library is introduced 此外，本文还介绍了pci总线有关知识，重点描述了pci总线配置空间等与编制系统设备驱动程序密切相关的知识点。
	5.	The paper introduces the property of pci bus , describes the signals and commands and the transfer protocol of pci bus , focuses on two key techniques of pci bus : interrupt procession and configuration technologies 论文介绍了pci总线的特点、 pci总线规范、和pci总线操作中的两个关键技术： pci总线配置技术， pci总线中断实现技术。
	6.	The part of debugging the encoder describes mainly saa7113 being configured by i ~ 2c bus and mb86390 being configured by downloading from serial interface and designing of fpga blocking program and emulating the timing order 编码器的调试主要包括saa7113的i ~ 2c总线配置、 mb86390初始化配置数据的串口下载、 fpga控制程序的模块化设计及时序仿真。
	7.	We use the tms320dm642 as the core of the whole hardware system , configure abundant function module for system adopting modularization design idea , including emif bus configuration module , audio module , video capture module , video display module and network module 整个硬件系统以tms320dm642为核心,采用模块化设计思想,为系统配置了丰富的功能模块: emif总线配置模块、音频模块、视频捕获模块、视频显示模块以及网络模块。
	8.	Ql5030 , to implement the design of the interface chip . the pci interface controller and programmable logic were integraed in ql5030 chip . on the basis of the profound comprehension of pci protocol , we designed the bus configuration , data transision logicand self - test logic by using the languge such as vhdl . verilog Ql5030内集成了pci接口控制器和用户可编程逻辑fpga 。本设计在深刻理解pci协议的基础上，在用户可编程逻辑fpga上，应用硬件描述语言vhdl 、 verilog ，设计了总线配置空间、数据传输逻辑和闭环自测试逻辑。

Similar Words：

"总线命名规则错误" Chinese translation, "总线母板" Chinese translation, "总线判优" Chinese translation, "总线判优器" Chinese translation, "总线判优器片" Chinese translation, "总线批准" Chinese translation, "总线批准信号" Chinese translation, "总线频率" Chinese translation, "总线请求" Chinese translation, "总线请求器" Chinese translation