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Home > english-chinese > "指令地址" in Chinese

Chinese translation for "指令地址"

address instruction
cma command address
i truction addre
ia
instruction address
instructions address
order code


Related Translations:
发送指令:  emit instructionrouting
指令带:  command tapei truction tapeinstruction tapeorder tape
回收指令:  recovery command
else指令:  else instruction
初始指令:  initial order
短指令:  short instruction
引导指令:  bootstrap driverbootstrapingbootstrappinghoming orderkey i tructionkey instruction
欧洲经济共同体指令:  european economic community command
原始指令:  presumptive instruction
指令系数:  command factor
Example Sentences:
1.Address instruction , functional
函数指令地址
2.Address instruction , immediate
实时指令地址
3.Address source , instruction
指令地址
4.A register in the processor that contains the address of the next instruction to be executed . also known as a program counter
包含下一条要执行指令地址的处理器中的寄存器。也叫程序计数器。
5.The ability to save the address of the next sequential instruction is provided on all branch instructions , including the branch to link register instruction
所有的转移指令都具备保存后继顺序指令地址的能力,包括到链接寄存器的转移。
6.System calls . when an emulator ordinarily encounters a powerpc system call instruction , it emulates the exception by storing the instruction address into the srr0 register , setting some architecture - defined bits in srr1 , and transferring control to physical address 0xc00 . some powerpc variants allow more control over this behavior , but this is the traditional powerpc model
当仿真器正常地碰到一个powerpc系统调用指令时,它便将指令地址存入到srr0寄存器,设置srr1中某些体系结构定义的位,并将控制权转交给物理地址0xc00 ,从而仿真这个异常(有些powerpc的变种允许对这种行为有更多的控制,但是这里的这种是传统的powerpc模型) 。
7.The paper elaborates risc technology characteristic and 5 - stage pipeline architecture and function of the 64 - bit risc cpu , and dwells on 64 - bit vega cpu characteristic , and details the eda technology and the main flow of asic design , and elaborates the operation and exception process of the vega cpu and virtual instruction address " architecture and generation , and details cache architecture and mmu . the master dissertation dwells on virtual address translating into physical address , instruction cache finding address and instruction fetching , too
详细的阐述了64位vegacpu的特点,阐述了eda技术和asic设计的主要流程,阐述了vegacpu流水线结构、流水线操作、流水线暂停和异常处理,虚拟指令地址的结构和产生, mmu结构,包括指令tlb结构和虚拟指令地址向物理指令地址的生成流程, cache结构,寻址原理和指令的写策略,指令高速缓存的寻址原理和结构,以及指令的获取流程。
Similar Words:
"指令的机器码" Chinese translation, "指令的实际操作数" Chinese translation, "指令的书写形式" Chinese translation, "指令的说明" Chinese translation, "指令灯" Chinese translation, "指令地址寄存器" Chinese translation, "指令地址寄存器, 顺序控制寄存器" Chinese translation, "指令地址源" Chinese translation, "指令电路" Chinese translation, "指令调度" Chinese translation