| 1. | Signal integrity of high - speed design
高速时钟电路的信号完整性设计 |
| 2. | Clocking - circuit radiated disturbance and spread - spectrum technique
时钟电路辐射骚扰与扩频技术 |
| 3. | The surrounding circuits design mainly includes the clock circuit , mute circuit and antenna switching circuit
其中外围电路涉及到时钟电路、静音电路和天线切换电路的设计。 |
| 4. | Abstract : trigger circuit , power supply circuit , clocking circuit and reset circuit are the main circuits on the main board
摘要：触发电路、供电电路、时钟电路、复位电路是主板上最主要的电路。 |
| 5. | Zero - delayed clock buffers are adopted in clock circuit so that it can meet the various clocks ’ requirement needed by the system
时钟电路采用零延时的时钟buffer ,能很好的满足各种时钟的同源/同相要求。 |
| 6. | The hardware circuit is designed for the system , including the power module , clock circuit module and jtag interface
对整个系统的硬件电路进行了设计,包括相应的电源模块、时钟电路模块、电平转换模块和jtag接口。 |
| 7. | System clock provides several synchronism clocks for every sub - circuit . reset circuit assumes that digital circuits have an initial state and self start
系统时钟电路分出多个同步频率,以提供不同数字子电路的同步时钟。 |
| 8. | The detailed functional modules consist of pci protocol conversion module 、 driver and magnifying module 、 control logic 、 clock circuit and configuration circuit
具体的功能模块包括pci协议转换模块、驱动放大模块、控制逻辑、时钟电路fifo电路和配置电路。 |
| 9. | In this system , high speed clock is produced by the clock circuit when acquiring and feeding back signal . the required clock is produced by the pc program when communicating
在本系统中采集和回放时所需的高速时钟由时钟电路产生，通讯时所需的时钟则由上位机的程序产生。 |
| 10. | The hardware design section mainly introduces the circuit design , including the peripheral circuit design of pm5366 and pm4329 and the design of clock circuit and interrupt circuit
硬件设计部分主要介绍电路的设计,包括pm5366和pm4329的电路设计,以及时钟电路和中断电路的设计。 |
